CXD3003 datasheet(40/137 Pages) SONY

부품명	CXD3003

상세설명	CD Digital Signal Processor with Built-in Digital Servo and DAC

PDF	137 Pages

Scroll/Zoom	100%

제조업체	SONY [Sony Corporation]

홈페이지	http://www.sony.co.jp

Logo

40 / 137 page

– 40 –

CXD3003R

Command bit

Processing

SCOR SEL = 0

SCOR SEL = 1

FSW signal is output.

GRSCOR (protected SCOR) is output.

Command bit

Processing

SCSY = 0

SCSY = 1

No processing.

GRSCOR (protected SCOR) synchronization is applied again.

∗ Used when outputting GRSCOR from the FSW pin.

∗ Used to resynchronize GRSCOR.

the rising edge signal of this command bit is used internally. Therefore, when resynchronizing GRSCOR, first

return the setting to 0 and then set to 1.

GRSCOR achieves the crystal accuracy by removing the jitter components included in the SCOR signal. This

signal is synchronized with PCMDATA.

The resynchronization conditions are when GTOP = high or when the SCSY pin = high.

(Same as when SCSY = 1 is sent by the $8X command.)

Command

Data 5

MODE

specification

ERC4

SCOR

SEL

SCSY

Command bit

Processing

ERC4 = 0

ERC4 = 1

C2 error double correction is performed when DSPB = 1.

C2 error quadruple correction is performed when DSPB = 1.

CXD3003 데이터시트(PDF) 40 Page - Sony Corporation