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CXD3003 데이터시트(PDF) 114 Page - Sony Corporation

부품명 CXD3003
상세설명  CD Digital Signal Processor with Built-in Digital Servo and DAC
PDF  137 Pages
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제조업체  SONY [Sony Corporation]
홈페이지  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD3003 데이터시트(HTML) 114 Page - Sony Corporation

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CXD3003R
$38 (preset: $38 00 00)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
VCLM VCLC FLM FLC0 RFLM RFLC AGF AGT
DFS LKSW TBLM TCLM FLC1 TLC2 TLC1 TLC0
VCLM: VC level measurement (on/off)
VCLC: VC level compensation for FCS In register (on/off)
FLM:
Focus zero level measurement (on/off)
FLC0:
Focus zero level compensation for FZC register (on/off)
RFLM: RF zero level measurement (on/off)
RFLC: RF zero level compensation (on/off)
AGF:
Focus auto gain adjustment (on/off)
AGT:
Tracking auto gain adjustment (on/off)
DFSW: Defect disable switch (on/off)
Setting this switch to 1 (on) disables the defect countermeasure circuit.
LKSW: Lock switch (on/off)
Setting this switch to 1 (on) disables the sled free-running prevention circuit.
TBLM: Traverse center measurement (on/off)
TCLM: Tracking zero level measurement (on/off)
FLC1:
Focus zero level compensation for FCS In register (on/off)
TLC2:
Traverse center compensation (on/off)
TLC1:
Tracking zero level compensation (on/off)
TLC0:
VC level compensation for TRK/SLD In register (on/off)
Note) Commands marked with
are accepted every 2.9ms. (when MCK = 128Fs)
All commands are on when set to 1.



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