WM8952ECSSLASHRV datasheet(18/72 Pages) WOLFSON

18 / 72 page

WM8952

Pre Production

PP, Rev 3.1, June 2011

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R45

Input PGA

volume

control

INPPGAZC

Input PGA zero cross enable:

0=Update gain when gain register changes

1=Update gain on 1st zero cross after gain

INPPGAMUTE

Mute control for input PGA:

0=Input PGA not muted, normal operation

1=Input PGA muted (and disconnected from

the following input BOOST stage).

5:0

INPPGAVOL

010000

Input PGA volume

000000 = -12dB

000001 = -11.25db

010000 = 0dB

111111 = 35.25dB

R32

ALC control 1

ALCSEL

ALC function select:

0=ALC off (PGA gain set by INPPGAVOL

1=ALC on (ALC controls PGA gain)

Table 4 Input PGA Volume Control

AUXILIARY INPUT

An auxiliary input circuit (Figure 7) is provided which consists of an amplifier which can be configured

either as an inverting buffer for a single input signal or as a mixer/summer for multiple inputs with the

use of external resistors. The circuit is enabled by the register bit AUXEN.

Figure 7 Auxiliary Input Circuit

The AUXMODE register bit controls the auxiliary input mode of operation:

In buffer mode (AUXMODE=0) the switch labelled AUXSW in Figure 7 is open and the signal at the

AUX pin will be buffered and inverted through the aux circuit using only the internal components.

In mixer mode (AUXMODE=1) the on-chip input resistor is bypassed, this allows the user to sum in

multiple inputs with the use of external resistors. When used in this mode there will be gain

variations through this path from part to part due to the variation of the internal 20kΩ resistors

relative to the higher tolerance external resistors.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

Power

management 1

AUXEN

Auxiliary input buffer enable

0 = OFF

1 = ON

R44

Input control

AUXMODE

0 = inverting buffer

1 = mixer (on-chip input resistor bypassed)

Table 5 Auxiliary Input Buffer Control

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