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WM8952ECS/RV 데이터시트(PDF) 22 Page - Wolfson Microelectronics plc |
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WM8952ECS/RV 데이터시트(HTML) 22 Page - Wolfson Microelectronics plc |
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22 / 72 page ![]() WM8952 Pre Production w PP, Rev 3.1, June 2011 22 ANALOGUE TO DIGITAL CONVERTER (ADC) The WM8952 uses a multi-bit, oversampled sigma-delta ADC channel. The use of multi-bit feedback and high oversampling rates reduces the effects of jitter and high frequency noise. The ADC Full Scale input level is proportional to AVDD. With a 3.3V supply voltage, the full scale level is 1.0Vrms. Any voltage greater than full scale may overload the ADC and cause distortion. ADC DIGITAL FILTERS The ADC filters perform true 24 bit signal processing to convert the raw multi-bit oversampled data from the ADC to the correct sampling frequency to be output on the digital audio interface. The digital filter path is illustrated in Figure 10. Figure 10 ADC Digital Filter Path The ADC is enabled by the ADCEN register bit. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R2 Power management 2 0 ADCEN 0 0 = ADC disabled 1 = ADC enabled Table 11 ADC Enable The polarity of the output signal can also be changed under software control using the ADCPOL register bit. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R14 ADC Control 0 ADCPOL 0 0=normal 1=inverted Table 12 ADC Polarity |
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