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ADRF6806ACPZ-R7 데이터시트(PDF) 5 Page - Analog Devices

부품명 ADRF6806ACPZ-R7
상세설명  50 MHz to 525 MHz Quadrature Demodulator with Fractional-N PLL and VCO
PDF  36 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADRF6806ACPZ-R7 데이터시트(HTML) 5 Page - Analog Devices

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Data Sheet
ADRF6806
Rev. B | Page 5 of 36
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
Supply Current (5 V) (LPEN = 1)
Normal Rx mode
75
mA
Rx mode with LO buffer enabled
75
mA
Supply Current (5 V)
Power-down mode
10
mA
Supply Current (3.3 V)
Power-down mode
15
mA
TIMING CHARACTERISTICS
VS1 (VVCCBB and VVCCRF) = 5 V, and VS2 (VVCC1, VVCC2, and VVCCLO) = 3.3 V.
Table 2.
Parameter
Limit at TMIN to TMAX (B Version)
Unit
Test Conditions/Comments
t1
20
ns min
LE Setup Time
t2
10
ns min
DATA to CLK setup time
t3
10
ns min
DATA to CLK hold time
t4
25
ns min
CLK high duration
t5
25
ns min
CLK low duration
t6
10
ns min
CLK to LE setup time
t7
20
ns min
LE pulse width
CLOCK
DATA
LE
LE
DB23 (MSB)
DB22
DB2
DB1
(CONTROL BIT C2)
DB0 (LSB)
(CONTROL BIT C1)
t1
t2
t3
t7
t6
t4
t5
Figure 2. Timing Diagram



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