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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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M68ICS08GR 데이터시트(PDF) 255 Page - Freescale Semiconductor, Inc |
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M68ICS08GR 데이터시트(HTML) 255 Page - Freescale Semiconductor, Inc |
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255 / 408 page  Serial Communications Interface (SCI) I/O Registers MC68HC908GR8 — Rev 4.0 Technical Data MOTOROLA Serial Communications Interface (SCI) 255 NOTE: Changing the PTY bit in the middle of a transmission or reception can generate a parity error. 18.9.2 SCI Control Register 2 SCI control register 2: • Enables the following CPU interrupt requests: – Enables the SCTE bit to generate transmitter CPU interrupt requests – Enables the TC bit to generate transmitter CPU interrupt requests – Enables the SCRF bit to generate receiver CPU interrupt requests – Enables the IDLE bit to generate receiver CPU interrupt requests • Enables the transmitter • Enables the receiver • Enables SCI wakeup • Transmits SCI break characters Table 18-5. Character Format Selection Control Bits Character Format M PEN and PTY Start Bits Data Bits Parity Stop Bits Character Length 0 0X 1 8 None 1 10 bits 1 0X 1 9 None 1 11 bits 0 10 1 7 Even 1 10 bits 0 11 1 7 Odd 1 10 bits 1 10 1 8 Even 1 11 bits 1 11 1 8 Odd 1 11 bits Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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