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AM85C30 데이터시트(PDF) 93 Page - Advanced Micro Devices |
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AM85C30 데이터시트(HTML) 93 Page - Advanced Micro Devices |
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93 / 194 page ![]() Data Communication Modes Functional Description AMD 4–41 DATA DATA CRC1 CRC2 EXTERNAL SYNC SIGNAL Figure 4–26. External SYNC Message Format The SYNC input falling edge (synchronized through some internal circuitry) essentially removes the Receiver from “Hunt Mode” in which it is waiting for synchronization before accepting Receive Data. Upon exiting “Hunt Mode”, the Receiver will begin accepting all incoming Receive Data. To cause the Am85C30 to discontinue accepting data (i.e. notify the Am85C30 that there is an end of frame), the “Enter Hunt Mode” command must be issued. The SYNC line should remain low for at least the TwSY (SYNC* Pulse Width) specification value, and may be kept low for a longer duration of time if desired. 4.10.2.5.1 SDLC External SYNC Mode By programming WR4 as shown below both the receiver and transmitter will be placed in SDLC mode. The only variation from normal SDLC operation will be that the SYNC pin will be used to start or stop the reception of a frame by forcing the receiver to act as though a flag had been received. 11 11 00 ?? D7 D6 D5 D4 D3 D2 D1 D0 WR4—Register Layout 4.10.2.5.2 Synchronous External SYNC Mode By programming WR4 as shown below the transmitter will be configured for MONOSYNC operation and the SYNC pin will be used to start the reception of a message. D7 ? D6 ? D5 1 D4 1 D3 0 D2 0 D1 ? D0 ? 0 0 programming either of these bit patterns specifies that only the SYNC pin can be used for character sync either the SYNC pin or a match with the character stored in WR7 will signal character sync 1 0 1 0 WR4—Register Layout |
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