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AT89LP51RB2 데이터시트(PDF) 84 Page - ATMEL Corporation

부품명 AT89LP51RB2
상세설명  8-bit Microcontroller Compatible with 8051 Products
PDF  254 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
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AT89LP51RB2 데이터시트(HTML) 84 Page - ATMEL Corporation

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3722A–MICRO–10/11
AT89LP51RB2/RC2/IC2 Preliminary
13.6.1
Mode 0 – 8-bit PWM with 8-bit Logarithmic Prescaler
In Mode 0, TLn acts as a logarithmic prescaler driving 8-bit counter THn (see Figure 13-6). The
PSCn bits in TCONB control the prescaler value. On THn overflow, the duty cycle value in RHn
is transferred to OCRn and the output pin is set high. When the count in THn matches OCRn,
the output pin is cleared low. The following formulas give the output frequency and duty cycle for
Timer n in PWM Mode 0. Timer 1 in PWM Mode 0 is identical to Timer 0.
Note:
In Fast Mode, TPS applies only when the TnX2 bits in CKCON0 are set. TPS always
applies in Compatibility Mode, therefore setting TnX2 in Compatibility Mode will halve
the output frequency.
Figure 13-6. Timer/Counter 1 PWM Mode 0
13.6.2
Mode 1 – 8-bit PWM with 8-bit Linear Prescaler
In Mode 1, TLn provides linear prescaling with an 8-bit auto-reload from RLn (see Figure 13-7 on
page 85). On TLn overflow, TLn is loaded with the value of RLn. THn acts as an 8-bit counter.
On THn overflow, the duty cycle value in RHn is transferred to OCRn and the output pin is set
high. When the count in THn matches OCRn, the output pin is cleared low. The following formu-
las give the output frequency and duty cycle for Timer n in PWM Mode 1. Timer 1 in PWM Mode
1 is identical to Timer 0.
Note:
In Fast Mode, TPS applies only when the TnX2 bits in CKCON0 are set. TPS always
applies in Compatibility Mode, therefore setting TnX2 in Compatibility Mode will halve
the output frequency.
Mode 0:
f
out
f
SYS
256
2
PSCn
1
+
×
-----------------------------------------
1
TPS
1
+
---------------------
×
=
Duty Cycle %
100
RHn
256
------------
×
=
CLKSYS
TR1
GATE1
INT1 Pin
TL1
(8 Bits)
Control
PSC1
TH1
(8 Bits)
OCR1
RH1
(8 Bits)
=
T1
÷TPS
Mode 1:
f
out
f
SYS
256
256
RLn
–
()
×
-------------------------------------------------
1
TPS
1
+
---------------------
×
=
Duty Cycle %
100
RHn
256
------------
×
=



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