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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AT89LP51RB2 데이터시트(PDF) 97 Page - ATMEL Corporation |
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AT89LP51RB2 데이터시트(HTML) 97 Page - ATMEL Corporation |
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97 / 254 page  97 3722A–MICRO–10/11 AT89LP51RB2/RC2/IC2 Preliminary • Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an interrupt will be generated if the ECF bit in the CMOD register is set. The CF bit can only be cleared by software. •Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and are set by hardware when either a match or a capture occurs. These flags also can only be cleared by software. The PCA interrupt system is shown in Figure 15-2. Table 15-3. CCON – PCA Counter Control Register CCON Address = 0D8H Reset Value = 00x0 0000B Bit Addressable CF CR – CCF4 CCF3 CCF2 CCF1 CCF0 Bit 7 654 321 0 Symbol Function CF PCA Counter Overflow Flag Set by hardware when the PCA counter overflows from FFFFH to 0000H. CF generates an interrupt if the ECF bit in CMOD and EC bit in IEN0 are both set. Must be cleared by software. CR PCA Counter Run Control Clear to disable the PCA Counter from operating. Set to enable the PCA Counter to count at the CPS rate in CMOD. CCF4 PCA Module 4 Interrupt Flag Set by hardware when a compare of match occurs in Module 4. CCF4 generates an interrupt if the ECCF4 bit in CCAPM4 and EC bit in IEN0 are both set. Must be cleared by software. CCF3 PCA Module 3 Interrupt Flag Set by hardware when a compare of match occurs in Module 2. CCF3 generates an interrupt if the ECCF3 bit in CCAPM3 and EC bit in IEN0 are both set. Must be cleared by software. CCF2 PCA Module 2 Interrupt Flag Set by hardware when a compare of match occurs in Module 2. CCF2 generates an interrupt if the ECCF2 bit in CCAPM2 and EC bit in IEN0 are both set. Must be cleared by software. CCF1 PCA Module 1 Interrupt Flag Set by hardware when a compare of match occurs in Module 1. CCF1 generates an interrupt if the ECCF1 bit in CCAPM1 and EC bit in IEN0 are both set. Must be cleared by software. CCF0 PCA Module 0 Interrupt Flag Set by hardware when a compare of match occurs in Module 0. CCF0 generates an interrupt if the ECCF0 bit in CCAPM0 and EC bit in IEN0 are both set. Must be cleared by software. Table 15-4. CH – PCA Counter Register High CH Address = 0F9H Reset Value = 0000 0000B Not Bit Addressable C15 C14 C13 C12 C11 C10 C9 C8 Bit 7 654 321 0 Symbol Function C15-8 Module n Compare/Capture Register High Holds the higher order bits of the 16-bit PCA Timer/Counter. |
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