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AT89LP51RB2 데이터시트(PDF) 36 Page - ATMEL Corporation |
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AT89LP51RB2 데이터시트(HTML) 36 Page - ATMEL Corporation |
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36 / 254 page ![]() 36 3722A–MICRO–10/11 AT89LP51RB2/RC2/IC2 Preliminary A summary of data pointer instructions with fast context switching is listed inTable 5-3. 5.4.1 Data Pointer Update The Dual Data Pointers on the AT89LP51RB2/RC2/IC2 include two features that control how the data pointers are updated. The data pointer decrement bits, DPD1 and DPD0 in AUXR1, configure the INC DPTR instruction to act as DEC DPTR. The resulting operation will depend on DPS as shown in Table 5-4. These bits also control the direction of auto-updates during MOVC and MOVX. The data pointer update bits, DPU1 and DPU0, allow MOVX @DPTR and MOVC @DPTR instructions to update the selected data pointer automatically in a post-increment or post-decre- ment fashion. The direction of update depends on the DPD1 and DPD0 bits as shown in Table 5-5. These bits can be used to make block copy routines more efficient. Note that DPCF should be cleared to zero, disabling these modes, before any calls are made to the Flash API.Care must also be taken when interrupt routines use data pointers to ensure that correct operation is saved/restored correctly. Table 5-3. Data Pointer Instructions Instruction Operation DPS = 0 DPS = 1 JMP @A+DPTR JMP @A+DPTR0 JMP @A+DPTR1 MOV DPTR, #data16 MOV DPTR0, #data16 MOV DPTR1, #data16 MOV /DPTR, #data16 MOV DPTR1, #data16 MOV DPTR0, #data16 INC DPTR INC DPTR0 INC DPTR1 INC /DPTR INC DPTR1 INC DPTR0 MOVC A,@A+DPTR MOVC A,@A+DPTR0 MOVC A,@A+DPTR1 MOVC A,@A+/DPTR MOVC A,@A+DPTR1 MOVC A,@A+DPTR0 MOVX A,@DPTR MOVX A,@DPTR0 MOVX A,@DPTR1 MOVX A,@/DPTR MOVX A,@DPTR1 MOVX A,@DPTR0 MOVX @DPTR, A MOVX @DPTR0, A MOVX @DPTR1, A MOVX @/DPTR, A MOVX @DPTR1, A MOVX @DPTR0, A Table 5-4. Data Pointer Decrement Behavior DPD1 DPD0 Equivalent Operation for INC DPTR and INC /DPTR DPS = 0 DPS = 1 INC DPTR INC /DPTR INC DPTR INC /DPTR 0 0 INC DPTR0 INC DPTR1 INC DPTR1 INC DPTR0 0 1 DEC DPTR0 INC DPTR1 INC DPTR1 DEC DPTR0 1 0 INC DPTR0 DEC DPTR1 DEC DPTR1 INC DPTR0 1 1 DEC DPTR0 DEC DPTR1 DEC DPTR1 DEC DPTR0 |
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