| 전자부품 데이터시트 검색엔진 |
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UM0434 데이터시트(PDF) 78 Page - STMicroelectronics |
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UM0434 데이터시트(HTML) 78 Page - STMicroelectronics |
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78 / 390 page ![]() UM0434 Register model 79/391 Table 56 provides field definitions for DBCR3 Table 55. DBCR3 register 32 33 34 35 36 37 38 39 Field DEVT1C1 DEVT2C1 ICMPC1 IAC1C1 IAC2C1 IAC3C1 IAC4C1 DAC1RC1 Reset All zeros R/W R/W 40 41 42 43 44 45 46 47 Field DAC1WC1 DAC2RC1 DAC2WC1 IRPTC1 RETC1 DEVT1C2 DEVT2C2 ICMPC2 Reset All zeros R/W R/W 48 49 50 51 52 53 54 55 IAC1C2 IAC2C2 IAC3C2 IAC4C2 DAC1RC2 DAC1WC2 DAC2RC2 DAC2WC2 Reset All zeros R/W R/W 56 57 58 59 60 61 62 63 DEVT1T1 DEVT2T1 IAC1T1 IAC3T1 DAC1RT1 DAC1WT1 CNT2T1 CONFIG Reset All zeros R/W R/W SPR SPR 561 Table 56. DBCR3 field descriptions Bits Name Description 32 DEVT1C1 External debug event 1 count 1 enable. 0 Counting DEVT1 debug events by counter 1 is disabled. 1 Counting DEVT1 debug events by counter 1 is enabled. 33 DEVT2C1 External debug event 2 count 1 enable. 0 Counting DEVT2 debug events by counter 1 is disabled. 1 Counting DEVT2 debug events by counter 1 is enabled. 34 ICMPC1 Instruction complete debug event count 1 enable. 0 Counting ICMP debug events by counter 1 is disabled. 1 Counting ICMP debug events by counter 1 is enabled. ICMP events are masked by MSR[DE] = 0 when operating in internal debug mode. 35 IAC1C1 Instruction address compare 1 debug event count 1 enable. 0 Counting IAC1 debug events by counter 1 is disabled. 1 Counting IAC1 debug events by counter 1 is enabled. 36 IAC2C1 Instruction address compare2 debug event count 1 enable. 0 Counting IAC2 debug events by counter 1 is disabled. 1 Counting IAC2 debug events by counter 1 is enabled. |
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