UM0434 datasheet(112/390 Pages) STMICROELECTRONICS

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UM0434

Instruction model

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When the debug APU is enabled (HID0[DAPUEN] = 1), rfdi provides a way to return from a

debug interrupt. See

Chapter 4.13.1: Hardware implementation dependent register 0 (HID0)

on page 84,” for more information about enabling the debug APU.

The instruction form and definition is provided in the

EREF.

5.10.3

SPE APU instructions

SPE APU instructions treat 64-bit GPRs as a vector of two 32-bit elements. (Some

instructions also read or write 16-bit elements.) The SPE APU supports a number of forms

of multiply and multiply-accumulate operations, and of add and subtract to accumulator

operations. The SPE supports signed and unsigned forms, and optional fractional forms. For

these instructions, the fractional form does not apply to unsigned forms because integer and

fractional forms are identical for unsigned operands.

Table 104 shows how SPE APU vector multiply instruction mnemonics are structured.

Table 105 defines mnemonic extensions for these instructions.

Table 104.

SPE APU vector multiply instruction mnemonic structure

Prefix

Multiply element

Data type element

Accumulate element

evm

hog

heg

whg

wlg

half odd (16x16

→32)

half even (16x16

→32)

half odd guarded

(16x16

→32)

half even guarded

(16x16

→32)

word high (32x32

→32)

word low (32x32

→32)

word high guarded

(32x32

→32)

word low guarded

(32x32

→32)

word (32x32

→64)

usi

umi

ssi

ssf(1)

smi

smf

(1)

unsigned saturate

integer

unsigned modulo

integer

signed saturate integer

signed saturate

fractional

signed modulo integer

signed modulo fractional

aaw

anw

write to ACC

write to ACC & added ACC

write to ACC & negate ACC

write to ACC & ACC in words

write to ACC & negate ACC in

words

Low word versions of signed saturate and signed modulo fractional instructions are not supported. Attempting to execute

an opcode corresponding to these instructions causes boundedly undefined results.

Table 105.

Mnemonic extensions for multiply-accumulate instructions

Extension

Meaning

Comments

Multiply form

Half word even

×16→32

heg

Half word even guarded

×16→32, 64-bit final accumulator result

Half word odd

×16→32

hog

Half word odd guarded

×16→32, 64-bit final accumulator result

wWord

×32→64

Word high

×32→32, high-order 32 bits of product

Word low

×32→32, low-order 32 bits of product

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