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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD30121 데이터시트(PDF) 52 Page - NEC |
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UPD30121 데이터시트(HTML) 52 Page - NEC |
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52 / 76 page  Data Sheet U14691EJ1V0DS00 52 µµµµPD30121 (12) System bus parameter (IOCHRDY) (2/3) Invalid When WISAA (0:2) bits = 010, BSEL bit = 0 BUSCLKNote 1 (output) BUSCLKNote 1 (output) BUSCLKNote 1 (output) BUSCLKNote 1 (output) ADD (19:25), ADD (0:8) (output) ADD (9:18) (output) SHB# (output) MEMR#/MEMW#, IOR#/IOW# (output) IOCHRDY (input) ZWS# (input) DATA (output) DATA (input) Invalid tBCLKH1 tBCLKL1 tAVCKNote 2 tCLCKNote 2 tCLCH tCHAV tCHCL tCHRL tCHDV tDH tDS tRHCH tCLR tDVCL tAVCL Invalid MEMCS16#, IOCS16# (input) tCHSV tAVSV1 Notes 1. This indicates that there are four possible relationships between BUSCLK signal and other system bus interface signals. 2. This indicates the minimum setup time to the BUSCLK signal rising or falling edge. Remark The broken lines indicate high impedance. |
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