RM0312 datasheet(213/275 Pages) STMICROELECTRONICS

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RM0312

Serial peripheral interface (SPI)

223

Figure 79. RXNE behavior in receive-only mode (BDM = 0 and RXONLY = 1).

Case of continuous transfers

Bidirectional receive procedure (BDM = 1 and BDOE = 0)

In this mode, the procedure is similar to the Receive-only procedure except that the BDM bit

must be set and the BDOE bit must be reset in the SPI_CR2 register before enabling the

SPI.

Continuous and discontinuous transfers

When transmitting data in master mode, if the software is fast enough to detect each TXE

rising edge (or TXE interrupt) and to immediately write the SPI_DR register before the

ongoing data transfer is complete, the communication is said to be continuous. In this case,

there is no discontinuity in the generation of the SPI clock between each data and the BSY

bit will never be reset between each data transfer.

On the contrary, if the software is not fast enough, this can lead to some discontinuities in

the communication. In this case, the BSY bit is reset between each data transmission (see

Figure 80).

In master receive-only mode (BDM = 0 and RXONLY = 1) or in bidirectional receive mode

(BDM = 1 and BDOE = 0), the communication is always continuous and the BSY flag is

always read at 1.

In slave mode, the continuity of the communication is decided by the SPI master device. But

even if the communication is continuous, the BSY flag goes low between each transfer for a

minimum duration of one SPI clock cycle (see Figure 76).

MISO/MOSI (in)

DATA 1 = 0xA1

software waits until

RXNE=1 and reads 0xA1

from SPI_DR

SCK

DATA 2 = 0xA2

DATA 3 = 0xA3

Example with CPOL=1, CPHA=1, RXONLY=1

RXNE flag

Rx Buffer

set by hw

cleared by sw

(read SPI_DR)

0xA1

0xA2

0xA3

software waits until

RXNE=1 and reads 0xA2

from SPI_DR

software waits until

RXNE=1 and reads 0xA3

from SPI_DR

b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7 b0 b1 b2 b3 b4 b5 b6 b7

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