UPD750064CU datasheet(11/82 Pages) NEC

11 / 82 page

µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)

Data Sheet U10165EJ2V0DS00

3.2 Non-port Pins (2/2)

Pin Name

Input/Output

Alternate

Function

After Reset

I/O Circuit

Function

TypeNote

Input

–

XT1

Input

–

XT2

–

RESET

Input

–

System reset input (low-level active)

–

<B>

–

Internally connected. Connect directly to VDD.–

–

VDD

–

Positive power supply

–

VSS

–

Ground potential

–

Note

Circuit types enclosed in brackets indicate the Schmitt trigger input.

Crystal/ceramic connection pin for the main system

clock oscillation.

When inputting the external

clock, input the external clock to pin X1, and the

inverted phase of the external clock to pin X2.

Crystal connection pin for the subsystem clock

oscillation. When the external clock is used, input

the external clock to pin XT1, and the inverted

phase of the external clock to pin XT2. Pin XT1 can

be used as a 1-bit input (test) pin.

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