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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LAN9500AI 데이터시트(PDF) 201 Page - Microchip Technology |
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LAN9500AI 데이터시트(HTML) 201 Page - Microchip Technology |
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201 / 213 page  2010 - 2015 Microchip Technology Inc. DS00001875A-page 201 LAN950x 8.5.6 TURBO MII INTERFACE TIMING This section specifies the Turbo MII interface transmit and receive timing. Note 8-16 Timing was designed for system load between 10 pf and 15 pf. FIGURE 8-7: TURBO MII TRANSMIT TIMING TABLE 8-20: TURBO MII TRANSMIT TIMING VALUES Symbol Description MIN TYP MAX Notes tclkp TXCLK period 20 ns tclkh TXCLK high time tclkp*0.4 tclkp*0.6 ns tclkl TXCLK low time tclkp*0.4 tclkp*0.6 ns tval TXD[3:0], TXEN output valid from rising edge of TXCLK 12.5 ns Note 8-16 thold TXD[3:0], TXEN output hold from rising edge of TXCLK 1.5 ns Note 8-16 FIGURE 8-8: TURBO MII RECEIVE TIMING TXCLK TXD[3:0] TXEN tclkh tclkl tclkp tval thold tval tval thold RXCLK tsu RXD[3:0] RXDV tclkh tclkl tclkp thold tsu thold thold tsu thold |
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