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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MEC1322 데이터시트(PDF) 156 Page - Microchip Technology |
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MEC1322 데이터시트(HTML) 156 Page - Microchip Technology |
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156 / 456 page  MEC1322 DS00001719D-page 156 2014 - 2015 Microchip Technology Inc. 11.15.1 HOST2EC DATA REGISTER 11.15.2 EC DATA REGISTER 11.15.3 EC KEYBOARD STATUS REGISTER This register is an alias of the Keyboard Status Read Register. The fields C/D, IBF, and OBF remain read-only. Offset 0h Bits Description Type Default Reset Event 7:0 HOST2EC_DATA This register is an alias of the HOST_EC Data / CMD Register. When read at the EC-Only offset of 0h, it returns the data written by the Host to either Runtime Register offset 0h or Runtime Register offset 04h. R0h VCC1_R ESET Offset 0h Bits Description Type Default Reset Event 7:0 EC_DATA W 0h VCC1_R ESET Offset 04h Bits Description Type Default Reset Event 7:6 UD2 User-defined data. Readable and writable by the EC. R/W 0h VCC1_R ESET 5AUXOBF Auxiliary Output Buffer Full. This bit is set to ‘1’ whenever the EC writes the EC AUX Data Register. This flag is reset to ‘0’ whenever the EC writes the EC Data Register. R/W 0h VCC1_R ESET 4 UD1 User-defined data. Readable and writable by the EC when written by the EC at its EC-only alias. R/W 0h VCC1_R ESET 3C/D Command Data. This bit specifies whether the input data register contains data or a command. During a Host command write opera- tion (when the Host writes the HOST_EC Data / CMD Register at offset 04h), this bit is set to ‘1’. During a Host data write operation (when the Host writes the HOST_EC Data / CMD Register at offset 0h), this bit is set to ‘0’. 1=Command 0=Data R0h VCC1_R ESET 2 UD0 User-defined data. Readable and writable by the EC when written by the EC at its EC-only alias. This bit is reset to ‘0’ when the LRESET# pin signal is asserted. R/W 0h VCC1_R ESET and PCI RESET# |
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