AD6679 datasheet(74/81 Pages) AD

74 / 81 page

AD6679

Data Sheet

Rev. B | Page 74 of 81

Reg.

Addr.

(Hex)

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSB)

Default

Notes

0x271

Signal Monitor Period

Signal Monitor Period[7:1]

0x80

In dec-

imated

output

clock

cycles

0x272

Signal Monitor Period

Signal Monitor Period[15:8]

0x00

In dec-

imated

output

clock

cycles

0x273

Signal Monitor Period

Signal Monitor Period[23:16]

0x00

In dec-

imated

output

clock

cycles

0x274

Signal monitor result

control (local)

Result

update

1 = update

results (self

clear)

Result

selection

0 =

Reserved

1 = peak

detector

0x01

0x275

Signal Monitor Result

Signal Monitor Result[7:0]

When Register 0x0274, Bit 0 = 1, Result Bits[19:7] = Peak Detector Absolute Value[12:0];

Result Bits[6:0] = 0

Read

only,

updated

based

on Reg.

0x274,

Bit 4

0x276

Signal Monitor Result

Signal Monitor Result[15:8]

Read

only,

updated

based

on Reg.

0x274,

Bit 4

0x277

Signal Monitor Result

Signal Monitor Result[19:16]

Read

only,

updated

based

on Reg.

0x274,

Bit 4

0x278

Signal monitor period

counter result (local)

Period Count Result[7:0]

Read

only,

updated

based

on Reg

0x274,

Bit 4

Digital Downconverter (DDC) Function Registers—See the

Digital Downconverter (DDC) Section

0x300

DDC synchronization

control

DDC NCO

soft reset

0 = normal

operation

1 = reset

Synchronization

mode

00 = disabled

01 = continuous

11 = one shot

0x00

AD6679 데이터시트(PDF) 74 Page - Analog Devices

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