AD6679 datasheet(79/81 Pages) AD

79 / 81 page

Data Sheet

AD6679

Rev. B | Page 79 of 81

Reg.

Addr.

(Hex)

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSB)

Default

Notes

0x568

Output mode

Frame clock mode (only

used when in output

data mode is in byte

mode)

00 = frame clock always

off

01 = frame clock always

10 = reserved

11 = frame clock

conditionally on based

on PN23 sequence

Output data mode

000 = parallel interleaved mode

(one virtual converter)

001 = parallel interleaved mode

(two virtual converters)

010 = channel multiplexed

(even/odd) mode

(one virtual converter)

011 = channel multiplexed

(even/odd) mode

(two virtual converters)

100 = byte mode

(one virtual converter)

101 = byte mode

(two virtual converters)

110 = byte mode

(four virtual converters)

111 = byte mode

(eight virtual converters)

0x569

DCO output delay

DCO clock delay

00 = 0°

01 = 90° (available

when DCO rate is less

than sample clock

rate)

10 = 180°

11 = 270° (available

when DCO rate is less

than sample clock

rate)

0x01

0x56A

Output adjust

LVDS output drive current adjust

000 = 2 mA

001 = 2.25 mA

010 = 2.5 mA

011 = 2.75 mA

100 = 3.0 mA

101 = 3.25 mA

110 = 3.5 mA (default)

111 = 3.75 mA

0x4C

0x56B

Output slew rate

adjust

Output slew rate

control

00 = 80 ps

01 = 150 ps

10 = 200 ps

11 = 250 ps

0x00

AD6679 데이터시트(PDF) 79 Page - Analog Devices

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