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TMP320C2811PBKA 데이터시트(PDF) 104 Page - Texas Instruments

부품명 TMP320C2811PBKA
상세설명  TMS320R2811, TMS320R2812 Digital Signal Processors
PDF  147 Pages
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Electrical Specifications
104
June 2004
SPRS257
6.18 General-Purpose Input/Output (GPIO) − Input Timing
GPIO
Signal
1
Sampling Window
QUALPRD
Output From
Qualifier
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
SYSCLKOUT
QUALPRD = 1
(2 x SYSCLKOUT cycles) x 5
NOTES: A. This glitch will be ignored by the input qualifier. The QUALPRD bit field specifies the qualification sampling period. It can vary
from 00 to 0xFF. Input qualification is not applicable when QUALPRD = 00. For any other value “n”, the qualification sampling
period in 2n SYSCLKOUT cycles (i.e., at every 2n SYSCLKOUT cycle, the GPIO pin will be sampled). Six consecutive samples
must be of the same value for a given input to be recognized.
B. For the qualifier to detect the change, the input should be stable for 10 SYSCLKOUT cycles or greater. In other words, the inputs
should be stable for (5 x QUALPRD x 2) SYSCLKOUT cycles. This would ensure six sampling windows for detection to occur.
Since external signals are driven asynchronously, an 11-SYSCLKOUT-wide pulse ensures reliable recognition.
See Note A
Figure 6−19. GPIO Input Qualifier − Example Diagram for QUALPRD = 1
Table 6−19. General-Purpose Input Timing Requirements
MIN
MAX
UNIT
t G
Pulse duration GPIO low/high
All GPIOs
With no qualifier
2 * tc(SCO)
cycles
tw(GPI)
Pulse duration, GPIO low/high
All GPIOs
With qualifier
1 * tc(SCO) + IQT†
cycles
† Input Qualification Time (IQT) = [5 x QUALPRD x 2] * tc(SCO)
GPIOxn
XCLKOUT
tw(GPI)
Figure 6−20. General-Purpose Input Timing
NOTE:
The pulse width requirement for general-purpose input is applicable for the XBIO and ADCSOC
pins as well.



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