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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DP83256VF 데이터시트(PDF) 69 Page - National Semiconductor (TI) |
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DP83256VF 데이터시트(HTML) 69 Page - National Semiconductor (TI) |
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69 / 144 page  50 Registers (Continued) 525 DEVICE ID REGISTER (IDR) The Device ID Register contains the binary equivalent of the revision number for this device It can be used to ensure proper software and hardware versions are matched During a Control Bus Interface write cycle the Control Bus Write Command Register bit (CCR) of the Interrupt Condition Register (ICR) will be set to 1 and will ignore write cycle REVISION TABLE IDR DEVICE DESCRIPTION (hex) 10 PLAYERa Revision A 11 PLAYERa Revision B ACCESS RULES ADDRESS READ WRITE 18h Always Write Reject D7 D6 D5 D4 D3 D2 D1 D0 DID7 DID6 DID5 DID4 DID3 DID2 DID1 DID0 Bit Symbol Description D0 – D3 DID0 – DID3 DEVICE ID BIT k0-3l Circuit enhancement revision number Bit 3 is the MSB The initial revision of the PLAYERa is equal to 0 and enhancements will increment this number D4 – D7 DID4 – DID7 DEVICE ID BIT k4-7l Architecture level of the PHY device Bit 7 is the MSB The original PLAYER device was equal to 0 and the PLAYERa is equal to 1 This number will only be incremented after a significant architectural change 69 |
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