DP83256VF datasheet(77/144 Pages) NSC

부품명	DP83256VF

상세설명	PLAYERa??Device (FDDI Physical Layer Controller)

PDF	144 Pages

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제조업체	NSC [National Semiconductor (TI)]

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50 Registers (Continued)

533 CMT CONDITION REGISTER (CMTCR)

The CMT Condition Register maintains a history of all CMT events and actions performed The corresponding CMT Condition

Mask Register (CMTCMR) can be used to generate an interrupt When the bits in both the CMTCMR and CMTCR are set the

Receive Condition Register B’s Connection Service Event (RCRBCSE) bit will be set

ACCESS RULES

ADDRESS

READ

WRITE

20h

Always

Conditional

TCO

STE

RES

Bit

Symbol

Description

D0-D5

RES

RESERVED

Reserved for future use

STE

SCRUB TIMER EXPIRED

This bit is set to 1 when the Scrub Timer expires

Note

When STE is set the Configuration Register (CR) is protected

TCO

TRIGGER CONDITION OCCURRED

This bit is set to 1 when a trigger condition is met When a trigger occurs

the values in the Trigger Transmit Mode (TDRTTM2-0) are loaded into the Current Transmit Mode Register

(CTSRTM2-0)

Note

When TCO is set the Current Transmit State Register (CTSR) is protected

DP83256VF 데이터시트(PDF) 77 Page - National Semiconductor (TI)