CP3SP33SMSSLASHNOPB datasheet(86/407 Pages) TI1

86 / 407 page

DS433

Auxiliary Clock 1

12-Bit Prescaler

Analog/Digital

Converter (ADC)

A DCACR.CLK S E L

Bluetooth

Interface

P LL1 Cloc k

P LL2 Cloc k

Main Cloc k

P CLK Cloc k

Auxiliary Clock 3

12-Bit Prescaler

CVSD/PCM

Converter 1

P MMAUX 3CTL.AUX CLK S RC

P MMAUX 3P RS C.HPACLK

Auxiliary Clock 8

12-Bit Prescaler

Advanced Audio

Interface (AAI)

ACCR.CS S

P MMAUX 8CTL.AUX CLK S RC

P MMAUX 8P RS C.HPACLK

P MMAUX 1CTL.AUX CLK S RC

P MMAUX 1P RS C.HPACLK

Auxiliary Clock 2

12-Bit Prescaler

CVSD/PCM

Converter 0

P MMAUX 2CTL.AUX CLK S RC

P MMAUX 2P RS C.HPACLK

Telematics

Codec ADC 1

TCDCA DCCLK 1.A DCCLK S RC

Auxiliary Clock 4

12-Bit Prescaler

Telematics

Codec Stereo DACs

TCDCDACCLK .DACCLK S RC

Telematics

Codec ADC 2

TCDCA DCCLK 2.A DCCLK S RC

I2S CLK

S CK

P MMAUX 4CTL.AUX CLK S RC

P MMAUX 4P RS C.HPACLK

Auxiliary Clock 5

12-Bit Prescaler

I2S Interface

I2S CLK .CLK S E L

P MMAUX 5CTL.AUX CLK S RC

P MMAUX 5P RS C.HPACLK

Auxiliary Clock 6

12-Bit Prescaler

Universal Serial

Bus (USB)

P MMAUX 6CTL.AUX CLK S RC

P MMAUX 6P RS C.HPACLK

Auxiliary Clock 7

12-Bit Prescaler

Digital Signal

Processor (DSP)

P MMAUX 7CTL.AUX CLK S RC

P MMAUX 7P RS C.HPACLK

TCIO1

CP3SP33

SNOSCW5 – MAY 2013

www.ti.com

Figure 14-5 is block diagram of the auxiliary clock generation logic.

Figure 14-5. Auxiliary Clock Generators

Clock Generation

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