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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TMS320DM355CZCEA13 데이터시트(PDF) 70 Page - Texas Instruments |
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TMS320DM355CZCEA13 데이터시트(HTML) 70 Page - Texas Instruments |
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70 / 163 page  TMS320DM355 SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010 www.ti.com 3.5.2.2 Supported Clocking Configurations for DM355-135 (36 MHz reference) 3.5.2.2.1 DM355-135PLL1 (36 MHz reference) All supported clocking configurations for DM355-135 PLL1 with 36 MHz reference clock are shown in Table 3-4. Table 3-4. PLL1 Supported Clocking Configurations DM355-135 (36 MHz reference) PREDIV PLLM POSTDIV PLL1 ARM / Peripherals VENC VPSS VCO MPEG4 and JPEG Coprocessor (/8 fixed) (m (/2 or /1 (MHz) PLLDIV1 SYSCLK1 PLLDIV2 SYSCLK2 PLLDIV3 SYSCLK3 PLLDIV4 SYSCLK4 programmable) programmable) (/2 fixed) (MHz) (/4 fixed) (MHz) (/n (MHz) (/4 or /2 (MHz) programmable) programmable) bypass bypass bypass bypass 2 18 4 9 10 3.6 4 18 8 120 2 270 2 135 4 67.5 10 27 2 135 8 108 2 243 2 121.5 4 60.75 9 27 2 121.5 8 96 2 216 2 108 4 54 8 27 2 108 3.5.2.2.2 DM355-135 PLL2 (36 MHz reference) All supported clocking configurations for DM355-135 PLL2 with 36 MHz reference clock are shown in Table 3-5. Table 3-5. PLL2 Supported Clocking Configurations for DM355-135 (36 MHz reference) PREDIV PLLM POSTDIV PLL2 VCO DDR PHY DDR Clock (/n programmable) (m programmable) (/1 fixed) (MHz) PLLDIV1 SYSCLK1 DDR_CLK (/1 fixed) (MHz) (MHz) bypass bypass bypass bypass 1 36 18 18 133 1 266 1 266 133 27 150 1 200 1 200 100 27 120 1 160 1 160 80 70 Detailed Device Description Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM355 |
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