TMS320DM355CZCEA13 datasheet(77/163 Pages) TI1

77 / 163 page

TMS320DM355

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SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010

3.5.5

Peripheral Clocking Considerations

3.5.5.1

Video Processing Back End Clocking

The Video Processing Back End (VPBE) is a sub-module of the Video Processing Subsystem (VPSS).

The VPBE is designed to interface with a variety of LCDs and an internal DAC module. There are two

asynchronous clock domains in the VPBE: an internal clock domain and an external clock domain. The

internal clock domain is driven by the VPSS clock (PLL1 SYSCLK4). The external clock domain is

configurable; you can select one of five source:

•

24 MHz crystal input at MXI1

•

27 MHz crystal input at MXI2 (optional feature, not typically used)

•

PLL1 SYSCLK3

•

EXTCLK pin (external VPBE clock input pin)

•

PCLK pin (VPFE pixel clock input pin)

See the TMS320DM35x Digital Media System-on-Chip Video Processing Back End (VPBE) Reference

Guide (literature number SPRUF72) for complete information on VPBE clocking.

3.5.5.2

USB Clocking

The USB Controller is driven by two clocks: an output clock of PLL1 (SYSCLK2) and an output clock of

the USB PHY.

NOTE

For proper USB 2.0 function, SYSCLK2 must be greater than 60 MHz.

The USB PHY takes an input clock that is configurable by the USB PHY clock source bits (PHYCLKSRC)

in the USB PHY control register (USB_PHY_CTL) in the System Control Module. When a 24 MHz crystal

is used at MXI1/MXO1, set PHYCLKSRC to 0. This will present a 24 MHz clock to the USB PHY. When a

36 MHz crystal is used at MXI1/MXO1, set PHYCLKSRC to 1. This will present a 12 MHz clock (36 MHz

divided internally by three) to the USB PHY. The USB PHY is capable of accepting only 24 MHz and 12

MHz; thus you must use either a 24 MHz or 36 MHz crystal at MXI1/MXO1. See the TMS320DM355

DMSoC Universal Serial Bus (USB) Controller User's Guide (literature number SPRUED2) for more

information. See the TMS320DM35x Digital Media System-on-Chip (DMSoC) ARM Subsystem Reference

Guide (literature number SPRUFB3) for more information on the System Control Module.

Detailed Device Description

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