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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TMS320VC5502 데이터시트(PDF) 63 Page - Texas Instruments |
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TMS320VC5502 데이터시트(HTML) 63 Page - Texas Instruments |
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63 / 189 page  www.ti.com TMS320VC5502 Fixed-Point Digital Signal Processor SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004 3.10.5.3 PLL Divider 0 Register (PLLDIV0) (Prescaler) This register controls the value of the PLL prescaler (Divider D0). 15 14 8 D0EN Reserved R/W, 1 R, 0000000 7 5 4 0 Reserved PLLDIV0 R, 000 R/W, 00000 LEGEND: R = Read, W = Write, n = value at reset Figure 3-17. PLL Divider 0 Register Layout (0x1C8A) Table 3-15. PLL Divider 0 Register Bit Field Description BIT NAME BIT NO. ACCESS RESET VALUE DESCRIPTION D0EN 15 R/W 1 Divider D0 enable • D0EN = 0: Divider 0 disabled • D0EN = 1: Divider 0 enabled Reserved 14:5 R 0000000000 Reserved. Reads return 0. Writes have no effect. Functional Overview 63 |
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