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TMS320VC5502 데이터시트(PDF) 153 Page - Texas Instruments |
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TMS320VC5502 데이터시트(HTML) 153 Page - Texas Instruments |
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153 / 189 page ![]() www.ti.com 5.13 Parallel General-Purpose Input/Output (PGPIOx) Timings PG1 PG2 PG3 CLKOUT PGPIOx Input Mode PGPIOx Output Mode TMS320VC5502 Fixed-Point Digital Signal Processor SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004 Table 5-24 and Table 5-25 assume testing over recommended operating conditions(see Figure 5-27). Table 5-24. PGPIO Pins Configured as Inputs Timing Requirements VC5502-200 VC5502-300 NO. UNIT MIN MAX PG2 tsu(PGPIO-COH) Setup time, PGPIOx input valid before CLKOUT high(1) 6 ns PG3 th(COH-PGPIO) Hold time, PGPIOx input valid after CLKOUT high(1) 0 ns (1) In this case, CLKOUT reflects SYSCLK1. The CLKOUT Selection Register (CLKOUTSR) can be programmed to select SYSCLK1 as CLKOUT. Table 5-25. PGPIO Pins Configured as Outputs Switching Characteristics VC5502-200 VC5502-300 NO. PARAMETER UNIT MIN MAX PG1 td(COH-PGPIO) Delay time, CLKOUT high to PGPIOx output change(1) 0 10 ns (1) In this case, CLKOUT reflects SYSCLK1. The CLKOUT Selection Register (CLKOUTSR) can be programmed to select SYSCLK1 as CLKOUT. Figure 5-27. Parallel General-Purpose Input/Output (PGPIOx) Signal Timings Specifications 153 |
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