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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PM5347 데이터시트(PDF) 38 Page - PMC-Sierra, Inc |
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PM5347 데이터시트(HTML) 38 Page - PMC-Sierra, Inc |
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38 / 302 page  PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 22 Pin Name Type Pin No. Function RFCLK Input 191 The receive FIFO clock (RFCLK) is used to read words from the synchronous FIFO interface. RFCLK must cycle at a 52 MHz or lower instantaneous rate, but at a high enough rate to avoid FIFO overflow. RRDENB is sampled using the rising edge of RFCLK. RSOC, RCA, RXPRTY[1:0] and RDAT[15:0] are updated on the rising edge of RFCLK. RRDENB Input 190 The active low receive read enable input (RRDENB) is used to initiate reads from the receive FIFO. When sampled low using the rising edge of RFCLK, a word is read from the internal synchronous FIFO and output on bus RDAT[15:0]. When sampled high using the rising edge of RFCLK, no read is performed and outputs RDAT[15:0], RXPRTY[1:0] and RSOC are tristated if the TSEN input is high. RRDENB must operate in conjunction with RFCLK to access the FIFO at a high enough instantaneous rate as to avoid FIFO overflows. |
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