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EM351-RTR 데이터시트(PDF) 74 Page - Silicon Laboratories

부품명 EM351-RTR
상세설명  High-Performance, Integrated ZigBee/802.15.4 System-on-Chip
PDF  241 Pages
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제조업체  SILABS [Silicon Laboratories]
홈페이지  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EM351-RTR 데이터시트(HTML) 74 Page - Silicon Laboratories

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Rev 1.3
74
INT_SC1CFG: Address: 0x4000A848 Reset: 0x0
INT_SC2CFG: Address: 0x4000A84C Reset: 0x0
Register 8.3. INT_SCxCFG
INT_SC1CFG: Serial Controller 1 Interrupt Configuration Register
INT_SC2CFG: Serial Controller 2 Interrupt Configuration Register
Bit
31
30
29
28
27
26
25
24
Name
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Name
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Name
0
INT_
SC1PARERR
INT_
SC1FRMERR
INT_
SCTXULDB
INT_
SCTXULDA
INT_
SCRXULDB
INT_
SCRXULDA
INT_
SCNAK
Bit
7
6
5
4
3
2
1
0
Name
INT_
SCCMDFIN
INT_|
SCTXFIN
INT_
SCRXFIN
INT_
SCTXUND
INT_
SCRXOVF
INT_
SCTXIDLE
INT_
SCTXFREE
INT_
SCRXVAL
Bitname
Bitfield
Access
Description
INT_SC1PARERR
[14]
RW
Parity error received (UART) interrupt enable.
INT_SC1FRMERR
[13]
RW
Frame error received (UART) interrupt enable.
INT_SCTXULDB
[12]
RW
DMA transmit buffer B unloaded interrupt enable.
INT_SCTXULDA
[11]
RW
DMA transmit buffer A unloaded interrupt enable.
INT_SCRXULDB
[10]
RW
DMA receive buffer B unloaded interrupt enable.
INT_SCRXULDA
[9]
RW
DMA receive buffer A unloaded interrupt enable.
INT_SCNAK
[8]
RW
NACK received (TWI) interrupt enable.
INT_SCCMDFIN
[7]
RW
START/STOP command complete (TWI) interrupt enable.
INT_SCTXFIN
[6]
RW
Transmit operation complete (TWI) interrupt enable.
INT_SCRXFIN
[5]
RW
Receive operation complete (TWI) interrupt enable.
INT_SCTXUND
[4]
RW
Transmit buffer underrun interrupt enable.
INT_SCRXOVF
[3]
RW
Receive buffer overrun interrupt enable.
INT_SCTXIDLE
[2]
RW
Transmitter idle interrupt enable.
INT_SCTXFREE
[1]
RW
Transmit buffer free interrupt enable.
INT_SCRXVAL
[0]
RW
Receive buffer has data interrupt enable.



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