EM351-RTR datasheet(88/241 Pages) SILABS

88 / 241 page

Rev 1.3

8.5.2. Set Up and Configuration

The TWI controller is enabled by writing 3 to the SCx_MODE register. The TWI controller operates only in master

mode and supports both Standard (100 kbps) and Fast (400 kbps) TWI modes. Address arbitration is not

implemented, so multiple master applications are not supported.

The TWI master controller's serial clock (SCL) is produced by a programmable clock generator. SCL is produced

by dividing down 12 MHz according to the following equation:

EXP is the value written to the SCx_RATEEXP register and LIN is the value written to the SCx_RATELIN register.

Table 8.8 shows the rate settings for Standard-Mode TWI (100 kbps) and Fast-Mode TWI (400 kbps) operation.

The EM35x supports clock stretching. The slave device can hold SCL low on any received or transmitted data bit.

This inhibits further data transfers until SCL is allowed to go high again.

Table 8.8. TWI Clock Rate Programming

Clock Rate

SCx_RATELIN

SCx_RATEEXP

100 kbps

375 kbps*

400 kbps*

*Note:

At 400 kbps, the Philips I2C Bus specification requires the minimum low period of SCL to be 1.3 µs, but on

the EM35x it is 1.25 µs. If a slave device requires strict compliance with SCL timing, the clock rate must be

lowered to 375 kbps.

rate

12 MHz

LIN 1

 2

EXP



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