EM351-RTR datasheet(95/241 Pages) SILABS

95 / 241 page

Rev 1.3

For example, if the baud rate tolerance between receive and transmit is 200 ppm (reasonable if both sides are

derived from a crystal), and the baud rate is 115200 bps, then errors will not occur until the inter-byte gap exceeds

43 ms. If the gap is exceeded then the chance of an error is essentially random, with a probability of approximately

P = baud / 24e6. At 115200 bps, the probability of corruption is 0.5%.

The UART character frame format is determined by four bits in the SC1_UARTCFG register:



SC_UART8BIT specifies the number of data bits in received and transmitted characters. If this bit is clear,

characters have 7 data bits; if set, characters have 8 data bits.



SC_UART2STP selects the number of stop bits in transmitted characters. (Only one stop bit is required in

received characters.) If this bit is clear, characters are transmitted with one stop bit; if set, characters are

transmitted with two stop bits.



SC_UARTPAR controls whether or not received and transmitted characters include a parity bit. If

SC_UARTPAR is clear, characters do not contain a parity bit, otherwise, characters do contain a parity bit.



SC_UARTODD specifies whether transmitted and received parity bits contain odd or even parity. If this bit

is clear, the parity bit is even, and if set, the parity bit is odd. Even parity is the exclusive-or of all of the data

bits, and odd parity is the inverse of the even parity value. SC_UARTODD has no effect if SC_UARTPAR is

clear.

A UART character frame contains, in sequence:



The start bit



The least significant data bit



The remaining data bits



If parity is enabled, the parity bit



The stop bit, or bits, if 2 stop bits are selected.

Figure 8.3 shows the UART character frame format, with optional bits indicated. Depending on the options chosen

for the character frame, the length of a character frame ranges from 9 to 12 bit times.

Note that asynchronous serial data may have arbitrarily long idle periods between characters. When idle, serial

data (TXD or RXD) is held in the high state. Serial data transitions to the low state in the start bit at the beginning of

a character frame.

Figure 8.3. UART Character Frame Format

Idle time

Start

Bit

Data

Bit 0

Data

Bit 1

Data

Bit 2

Data

Bit 3

Data

Bit 4

Data

Bit 5

Data

Bit 6

Data

Bit 7

Parity

Bit

Stop

Bit

Stop

Bit

Start Bit

IdleTime

UART Character Frame Format

(optional sections are in italics)

TXD

RXD

EM351-RTR 데이터시트(PDF) 95 Page - Silicon Laboratories

EM351-RTR 데이터시트(HTML) 95 Page - Silicon Laboratories

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL