EM351-RTR datasheet(123/241 Pages) SILABS

123 / 241 page

123

Rev 1.3

9.3.3.2. External Clock Source Mode 1

This mode is selected when TIM_SMS = 111 in the TIMx_SMCR register. The counter can count at each rising or

falling edge on a selected input. Figure 9.13 shows the registers and signals used in the example that follows.

Figure 9.13. TI2 External Clock Connection Example

For example, to configure the up-counter to count in response to a rising edge on the TI2 input, use the following

procedure:



Configure channel 2 to detect rising edges on the TI2 input: Write TIM_CC2S = 01 in the TIMx_CCMR1



Configure the input filter duration: Write the TIM_IC2F bits in the TIMx_CCMR1 register (if no filter is

needed, keep TIM_IC2F = 0000).

Note:

The capture prescaler is not used for triggering, so it does not need to be configured.



Select rising edge polarity: Write TIM_CC2P = 0 in the TIMx_CCER register.



Configure the timer in external clock mode 1: Write TIM_SMS = 111 in the TIMx_SMCR register.



Select TI2 as the input source: Write TIM_TS = 110 in the TIMx_SMCR register.



Enable the counter: Write TIM_CEN = 1 in the TIMx_CR1 register.

When a rising edge occurs on TI2, the counter counts once and the INT_TIMTIF flag is set. The delay between the

rising edge on TI2 and the actual clock of the counter is due to the resynchronization circuit on the TI2 input. The

relationship between rising edges on TI2 and the resulting counter clocks is shown in Figure 9.14.

Figure 9.14. Control Circuit in External Clock Mode 1

EM351-RTR 데이터시트(PDF) 123 Page - Silicon Laboratories