PC87351 datasheet(17/86 Pages) NSC

17 / 86 page

1.0 Signal/Pin Connection and Description (Continued)

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1.4

DETAILED SIGNAL/PIN DESCRIPTIONS

1.4.1

Clock

1.4.2

Fan Speed Control

1.4.3

FDC (Including PPM)

The Parallel-Port/FDC MUX (PPM) provides a means to connect an external FDD on the Parallel Port connector, in addition

to the internal FDD on the FDC header. This is done by physically connecting internally each FDC pin to a corresponding

Parallel Port pin while isolating it from the Parallel Port logic. The Parallel Port becomes an additional connecting point to

the FDC interface as long as the PPM is in active mode. The functional descriptions in this table apply to both the FDC pin

and to the corresponding PPM pin. For a detailed description of PPM functionality, see Section 2.5.

112 GPIO10

I/O SIOCF3, Bit 0 = 0

DCD2

SIOCF3, Bit 0 = 1

113 GPIO11

DSR2

114 GPIO12

SIN2

115 GPIO13

RTS2

117 GPIO14

SOUT2

118 GPIO15

CTS2

119 GPIO16

DTR2/BOUT2

125 RING

SIOCF4, Bit 0 = 0

PME1

SIOCF4, Bit 0 = 1

126 SUSP

SIOCF4, Bit 2 = 0

PME2

SIOCF4, Bit 2 = 1

127 GPIO21

I/O SIOCF3, Bits 2-1 = 00

FANOUT0

I/O SIOCF3, Bits 2-1 = 01

P12

I/O SIOCF3, Bits 2-1 = 10

PNF

I/O SIOCF3, Bits 2-1 = 11

128 GPIO22

I/O SIOCF3, Bits 4-3 = 00

FANOUT1

I/O SIOCF3, Bits 4-3 = 01

IRRX2/IRSL0

I/O SIOCF3, Bits 4-3 = 10

P17

I/O SIOCF3, Bits 4-3 = 11

Signal

Pin/s

I/O

Buffer Type

Description

CLKIN

INT

Clock In. A 48MHz clock input.

Signal

Pin/s

I/O

Buffer Type

Description

FANOUT0

FANOUT1

127,

128

OO2/20

Fan Output 0, 1. Pulse Width Modulation (PWM) signals, that are used to

control the speed of cooling fans by controlling the voltage supplied to the

fan’s motor.

Table 1-3. Pin Multiplexing Conﬁguration (Continued)

Default

Alternate

Signal

I/O

Conﬁguration

Signal

I/O

Conﬁguration

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