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PC87351 데이터시트(PDF) 21 Page - National Semiconductor (TI) |
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PC87351 데이터시트(HTML) 21 Page - National Semiconductor (TI) |
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21 / 86 page ![]() 1.0 Signal/Pin Connection and Description (Continued) 21 www.national.com 1.4.7 Keyboard and Mouse Controller (KBC) Signal Pin/s I/O Buffer Type Description GA20 99 I/O INTS/OD4 Gate A20. KBC gate A20 (P21) output. KBCLK 100 I/O INTS/OD4 Keyboard Clock. Transfers the keyboard clock between the SuperI/O chip and the external keyboard using the PS/2 protocol. This pin is driven by the internal, inverted KBC P26 signal, and is connected internally to the T0 signal of the KBC. External pull-up resistor to 5V is required (for PS/2 compliance). The pin is monitored for wake-up event detection. However, to enable the activity during power off, it must be pulled up to Keyboard and Mouse standby voltage. KBDAT 101 I/O INTS/OD4 Keyboard Data. Transfers the keyboard data between the SuperI/O chip and the external keyboard using the PS/2 protocol. This pin is driven by the internal, inverted KBC P27 signal, and is connected internally to KBC P10. External pull-up resistor to 5V is required (for PS/2 compliance). The pin is monitored for wake-up event detection. To enable the activity, it must be pulled up to Keyboard and Mouse standby voltage. KBRST 98 I/O INTS/OD4 KBD Reset. Keyboard Reset (P20) output. MCLK 102 I/O INTS/OD4 Mouse Clock. Transfers the mouse clock between the SuperI/O chip and the external keyboard using the PS/2 protocol. This pin is driven by the internal, inverted KBC P23 signal, and is connected internally to KBC’s T1. External pull-up resistor to 5V is required (for PS/2 compliance). The pin is monitored for wake-up event detection. To enable the activity, it must be pulled up to Keyboard and Mouse standby voltage. MDAT 103 I/O INTS/OD4 Mouse Data. Transfers the mouse data between the SuperI/O chip and the external keyboard using the PS/2 protocol. This pin is driven by the internal, inverted KBC P22 signal, and is connected internally to KBC’s P11. External pull-up resistor to 5V is required (for PS/2 compliance). The pin is monitored for wake-up event detection. To enable the activity, it must be pulled up to Keyboard and Mouse standby voltage. P12 42, 98, 127 I/O INTS/OD4 I/O Port. KBC open-drain signal for general-purpose input and output, controlled by KBC firmware. P17 41, 42, 128 I/O INTS/OD4 I/O Port. KBC open-drain signal for general-purpose input and output, controlled by KBC firmware. |
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