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SPC564A80L7 데이터시트(PDF) 94 Page - STMicroelectronics

부품명 SPC564A80L7
상세설명  Up to 4 multiply and accumulate operations per cycle
PDF  157 Pages
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Electrical characteristics
SPC564A74L7, SPC564A80B4, SPC564A80L7
94/157
Doc ID 15399 Rev 9
3.6.2
Recommended power transistors
The following NPN transistors are recommended for use with the on-chip voltage regulator
controller: ON SemiconductorTM BCP68T1 or NJD2873 as well as Philips SemiconductorTM
BCP68. The collector of the external transistor is preferably connected to the same voltage
supply source as the output stage of the regulator.
3.7
Power up/down sequencing
There is no power sequencing required among power sources during power up and power
down, in order to operate within specification.
Although there are no power up/down sequencing requirements to prevent issues such as
latch-up or excessive current spikes the state of the I/O pins during power up/down varies
according to Table 19 for all pins with fast pads, and Table 20 for all pins with medium, slow,
and multi-voltage pads.
Table 18.
Recommended operating characteristics
Symbol
Parameter
Value
Unit
hFE ()
DC current gain (Beta)
60 – 550
—
PD
Absolute minimum power dissipation
>1.0
(1.5 preferred)
W
ICMaxDC
Minimum peak collector current
1.0
A
VCESAT
Collector-to-emitter saturation voltage
200 – 600(1)
1.
Adjust resistor at bipolar transistor collector for 3.3 V/5.0 V to avoid VCE < VCESAT.
mV
VBE
Base-to-emitter voltage
0.4 – 1.0
V
Table 19.
Power sequence pin states (fast pads)
VDDE
VRC33
VDD
Pad State
LOW
X
X
LOW
VDDE
LOW
X
HIGH
VDDE
VRC33
LOW
HIGH IMPEDANCE
VDDE
VRC33
VDD
FUNCTIONAL
Table 20.
Power sequence pin states (medium, slow, and multi-voltage pads)
VDDEH
VDD
Pad State
LOW
X
LOW
VDDEH
LOW
HIGH IMPEDANCE
VDDEH
VDD
FUNCTIONAL



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