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ST10F296 데이터시트(PDF) 280 Page - STMicroelectronics

부품명 ST10F296
상세설명  High performance 16-bit CPU with DSP functions
PDF  346 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST10F296 데이터시트(HTML) 280 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
Register set
ST10F296E
280/346
Before Flash initialization completion, the default settings of the different identification
registers are as follows:
●
IDMANUF: 0403h
●
IDCHIP: 128xh (x = silicon revision)
●
IDMEM: F0D0h
●
IDPROG: 0040h
23.10
System configuration registers
This section lists and describes 12 registers which are used for configuring various aspects
of the ST10F296E system.
System configuration register (SYSCON)
SYSCON (FF12h/89h)
SFR
Reset value: 0xx0h(1)
1.
SYSCON reset value is: 0000 0xx0 0x00 0000b.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
STKSZ
ROM
S1
SGT
DIS
ROM
EN
BYT
DIS
CLK
EN
WRC
FG
CSC
FG
PWD
CFG
OWD
DIS
BDR
STEN
XP
EN
VISI
BLE
XPERS
HARE
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW RW
RW
Table 150.
SYSCON register description
Bit
Bit name
Function
15-13
STKSZ
System stack size
Selects the size of the system stack (in the internal IRAM) from 32 to
1024 words.
12
ROMS1
Internal memory mapping
0: Internal memory area mapped to segment 0 (00’0000h...00’7FFFh).
1: Internal memory area mapped to segment 1 (01’0000h...01’7FFFh).
11
SGTDIS
Segmentation disable/enable control
0: Segmentation enabled (CSP is saved/restored during interrupt
entry/exit).
1: Segmentation disabled (only the IP is saved/restored).
10
ROMEN(1)
Internal memory enable (set according to the EA pin during reset)
0: Internal memory disabled. Accesses to the IFlash memory area is
made through the external bus.
1: Internal memory enabled.
9
BYTDIS(1)
Disable/enable control for the BHE pin (set according to data bus width)
0: BHE pin enabled.
1: BHE pin disabled. Pin may be used for general purpose I/O.
8
CLKEN
System clock output enable (CLKOUT)
0: CLKOUT disabled. Pin may be used for general purpose I/O.
1: CLKOUT enabled. Pin outputs the system clock signal or a
prescaled value of the system clock according to the XCLKOUTDIV
register setting.
Obsolete
Product(s)
- Obsolete
Product(s)



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