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ST10F296 데이터시트(PDF) 308 Page - STMicroelectronics |
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ST10F296 데이터시트(HTML) 308 Page - STMicroelectronics |
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308 / 346 page ![]() Obsolete Product(s) - Obsolete Product(s) Electrical characteristics ST10F296E 308/346 First transient period This is a quick charge transfer from the internal capacitances, CP1 and CP2, to the sampling capacitance, CS (initially CS is supposed to be completely discharged). Considering the worst case scenario (since the time constant in reality is faster) in which CP2 is in parallel to CP1 (call CP = CP1 + CP2), the two capacitances, CP and CS, are in series and the time constant is: Equation 26 Equation 26 can be simplified if only CS is considered as an additional worst condition. In reality, the transient is faster, but the ADC circuitry has been designed to be robust in the worst case situations. The sampling time, TS, is always much longer than the internal time constant as in Equation 27. Equation 27 The charge of CP1 and CP2 is also redistributed on CS, which determines a new value for the VA1 voltage on the capacitance according to Equation 28. Equation 28 Second transient period A second charge transfer also involves CF (that is typically greater than the on-chip capacitance) through the resistance RL. Consideringagain the worst case scenario in which CP2 and CS are in parallel to CP1 (since the time constant in reality is faster), the time constant is: Equation 29 In Equation 29, the time constant depends on the external circuit. In particular, if the transient is completed well before the end of the sampling time, TS, a constraint on RL sizing is obtained, as shown in Equation 30. Equation 30 RL must also be sized, according to the current limitation constraints, in combination with RS (source impedance) and RF (filter resistance). As CF is greater than CP1, CP2 and CS, the final voltage, VA2 (at the end of the charge transfer transient), is much higher than VA1. Equation 31 (the charge balance) must be respected assuming that CS is already charged at VA1. Equation 31 τ 1 R SW R AD + () C P C S × C P C S + ⁄ () × = τ 1 R SW R AD + () C S × T S « < V A1 C S C P1 C P2 ++ () × V A C P1 C P2 + () × = τ 2 R L C S C P1 C P2 ++ () × < 10 τ 2 × 10 R L × C S C P1 C P2 ++ () T S ≤ × = V A2 C S C P1 C P2 C F ++ + () × V A C F × V A1 C P1 C P2 C S ++ () × + = Obsolete Product(s) - Obsolete Product(s) |
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