ST72344S2 datasheet(56/247 Pages) STMICROELECTRONICS

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Interrupts

ST72344xx, ST2345xx

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Doc ID 12321 Rev 6

8.3

Interrupts and low-power modes

All interrupts allow the processor to exit the Wait low-power mode. On the contrary, only

external and other specified interrupts allow the processor to exit from the Halt modes (see

column “Exit from Halt” in Table 17: Interrupt mapping). When several pending interrupts are

present while exiting Halt mode, the first one serviced can only be an interrupt with exit from

Halt mode capability and it is selected through the same decision process shown in

Figure 21.

Note:

If an interrupt, that is not able to Exit from Halt mode, is pending with the highest priority

when exiting Halt mode, this interrupt is serviced after the first one serviced.

8.4

Concurrent & nested management

The following Figure 22 and Figure 23 show two different interrupt management modes. The

first is called concurrent mode and does not allow an interrupt to be interrupted, unlike the

nested mode in Figure 23. The interrupt hardware priority is given in this order from the

lowest to the highest: MAIN, IT4, IT3, IT2, IT1, IT0, TLI. The software priority is given for

each interrupt.

Warning:

A stack overflow may occur without notifying the software of

the failure.

Figure 22.

Concurrent interrupt management

MAIN

IT4

IT2

IT1

TRAP

IT1

MAIN

IT0

SOFTWARE

3/0

11 / 10

RIM

IT3

PRIORITY

LEVEL

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