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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST72344S2 데이터시트(PDF) 133 Page - STMicroelectronics |
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ST72344S2 데이터시트(HTML) 133 Page - STMicroelectronics |
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133 / 247 page  ST72344xx, ST2345xx On-chip peripherals Doc ID 12321 Rev 6 133/247 Figure 64. Word length programming 1. LBCL bit controls last data clock pulse. Transmitter The transmitter can send data words of either 8 or 9 bits depending on the M bit status. When the M bit is set, word length is 9 bits and the 9th bit (the MSB) has to be stored in the T8 bit in the SCICR1 register. When the transmit enable bit (TE) is set, the data in the transmit shift register is output on the TDO pin. Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8 Start Bit Stop Bit Next Start Bit Idle Frame Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Start Bit Stop Bit Next Start Bit Idle Frame Start Bit 9-bit (M bit is set) 8-bit (M bit is reset) Possible Parity Bit Possible Parity Bit Break Frame Start Bit Extra ’1’ Data Frame Break Frame Start Bit Extra ’1’ Data Frame Next Data Frame Next Data Frame Start Bit **** CLOCK CLOCK (1) (1) |
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