ST72344S2 datasheet(175/247 Pages) STMICROELECTRONICS

175 / 247 page

ST72344xx, ST2345xx

On-chip peripherals

Doc ID 12321 Rev 6

175/247

Figure 75.

Transfer sequencing

Legend: S = Start, P = Stop, A = Acknowledge, NA = Non-acknowledge,

WF = WF event, WFx bit is set (with interrupt if ITWEx=1, after Stop or Restart conditions),

cleared by reading the I2C3SSR register while no communication is ongoing.

RF = RF event, RFx is set (with interrupt if ITREx=1, after Stop or Restart conditions),

cleared by reading the I2C3SSR register while no communication is ongoing.

BusyW = BusyW flag in the I2C3CR2 register set, cleared by software writing 0.

Note:

The I2C3S supports a repeated start (Sr) in place of a stop condition (P).

Figure 76.

Byte write

Figure 77.

Page write

Figure 78.

Current address read

Figure 79.

Random read (dummy write + restart + current address read)

7-bit Slave receiver:

7-bit Slave transmitter:

S Address A

Data1

Data2

.....

DataN

A P

BusyW

S Address A

Data1

Data2

.....

DataN NA P

Ack

Start

Ack

Data

Ack

Stop

Ack

Start

Data

Ack

Stop

Ack

Data

Ack

Start

Data

Nack

Stop

RAck

Start

Ack

Ack Start

Ack

Data

Nack

Stop

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