STM32L471RG datasheet(70/218 Pages) STMICROELECTRONICS

70 / 218 page

Pinouts and pin description

STM32L471xx

70/218

DocID027226 Rev 1

137

PB7

I/O

FT_fa

LPTIM1_IN2, TIM4_CH2,

TIM8_BKIN, I2C1_SDA,

DFSDM_CKIN5,

USART1_RX,

UART4_CTS,

TSC_G2_IO4, FMC_NL,

TIM8_BKIN_COMP1,

TIM17_CH1N, EVENTOUT

COMP2_INM,

PVD_IN

138

BOOT0

139

PB8

I/O

FT_f

TIM4_CH3, I2C1_SCL,

DFSDM_DATIN6,

CAN1_RX, SDMMC1_D4,

SAI1_MCLK_A,

TIM16_CH1, EVENTOUT

140

PB9

I/O

FT_f

IR_OUT, TIM4_CH4,

I2C1_SDA, SPI2_NSS,

DFSDM_CKIN6,

CAN1_TX, SDMMC1_D5,

SAI1_FS_A, TIM17_CH1,

EVENTOUT

141

PE0

I/O

TIM4_ETR, FMC_NBL0,

TIM16_CH1, EVENTOUT

142

PE1

I/O

FMC_NBL1, TIM17_CH1,

EVENTOUT

143

VSS

64 100 C4

144

VDD

1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current

(3 mA), the use of GPIOs PC13 to PC15 in output mode is limited:

- The speed should not exceed 2 MHz with a maximum load of 30 pF

- These GPIOs must not be used as current sources (e.g. to drive an LED).

2. After a Backup domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of

the RTC registers which are not reset by the system reset. For details on how to manage these GPIOs, refer to the Backup

domain and RTC register descriptions in the RM0392 reference manual.

3. After reset, these pins are configured as JTAG/SW debug alternate functions, and the internal pull-up on PA15, PA13, PB4

pins and the internal pull-down on PA14 pin are activated.

Table 15. STM32L471xx pin definitions (continued)

Pin Number

Pin name

(function after

reset)

Pin functions

Alternate functions

Additional functions

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