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STM32L471RG 데이터시트(PDF) 96 Page - STMicroelectronics |
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STM32L471RG 데이터시트(HTML) 96 Page - STMicroelectronics |
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96 / 218 page ![]() Electrical characteristics STM32L471xx 96/218 DocID027226 Rev 1 6.3.2 Operating conditions at power-up / power-down The parameters given in Table 23 are derived from tests performed under the ambient temperature condition summarized in Table 22. 6.3.3 Embedded reset and power control block characteristics The parameters given in Table 24 are derived from tests performed under the ambient temperature conditions summarized in Table 22: General operating conditions. 3. For operation with voltage higher than Min (VDD, VDDA, VDDIO2) +0.3 V, the internal Pull-up and Pull-Down resistors must be disabled. 4. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Section 7.5: Thermal characteristics). 5. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 7.5: Thermal characteristics). Table 23. Operating conditions at power-up / power-down Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate - 0 ∞ µs/V VDD fall time rate 10 ∞ tVDDA VDDA rise time rate - 0 ∞ µs/V VDDA fall time rate 10 ∞ tVDDIO2 VDDIO2 rise time rate - 0 ∞ µs/V VDDIO2 fall time rate 10 ∞ Table 24. Embedded reset and power control block characteristics Symbol Parameter Conditions(1) Min Typ Max Unit tRSTTEMPO(2) Reset temporization after BOR0 is detected VDD rising - 250 400 μs VBOR0(2) Brown-out reset threshold 0 Rising edge 1.62 1.66 1.7 V Falling edge 1.6 1.64 1.69 VBOR1 Brown-out reset threshold 1 Rising edge 2.06 2.1 2.14 V Falling edge 1.96 2 2.04 VBOR2 Brown-out reset threshold 2 Rising edge 2.26 2.31 2.35 V Falling edge 2.16 2.20 2.24 VBOR3 Brown-out reset threshold 3 Rising edge 2.56 2.61 2.66 V Falling edge 2.47 2.52 2.57 VBOR4 Brown-out reset threshold 4 Rising edge 2.85 2.90 2.95 V Falling edge 2.76 2.81 2.86 VPVD0 Programmable voltage detector threshold 0 Rising edge 2.1 2.15 2.19 V Falling edge 2 2.05 2.1 |
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