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AS4C64M8D2 데이터시트(PDF) 35 Page - Alliance Semiconductor Corporation |
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AS4C64M8D2 데이터시트(HTML) 35 Page - Alliance Semiconductor Corporation |
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35 / 59 page ![]() AS4C64M8D2 Confidential 35 Rev. 1.0 Feb. /2014 Figure 12. ODT timing mode switch at entering power-down mode CK# CK tIS CKE tAOFD tAOND ODT tANPD T-5 T-4 T-3 T-2 T-1 T0 T1 T2 T3 T4 Entering Slow Exit Active Power Down Mode or Precharge Power Down Mode. RTT Internal Term Res. tIS VIL(ac) ODT RTT Internal Term Res. tIS VIL(ac) tAOFPD max Active & Standby mode timings to be applied. Power Down mode timings to be applied. tIS VIH(ac) RTT Active & Standby mode timings to be applied. tAONPD max tIS VIH(ac) Power Down mode timings to be applied. RTT ODT ODT Internal Term Res. Internal Term Res. |
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