전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

MAS3587F 데이터시트(PDF) 41 Page - Micronas

부품명 MAS3587F
상세설명  Audio Encoder/Decoder
PDF  82 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MICRONAS [Micronas]
홈페이지  http://www.micronas.com
Logo MICRONAS - Micronas

MAS3587F 데이터시트(HTML) 41 Page - Micronas

Back Button MAS3587F Datasheet HTML 37Page - Micronas MAS3587F Datasheet HTML 38Page - Micronas MAS3587F Datasheet HTML 39Page - Micronas MAS3587F Datasheet HTML 40Page - Micronas MAS3587F Datasheet HTML 41Page - Micronas MAS3587F Datasheet HTML 42Page - Micronas MAS3587F Datasheet HTML 43Page - Micronas MAS3587F Datasheet HTML 44Page - Micronas MAS3587F Datasheet HTML 45Page - Micronas Next Button
Zoom Inzoom in Zoom Outzoom out
 41 / 82 page
background image
ADVANCE INFORMATION
MAS 3587F
Micronas
41
3.3.5. DSP Volume Control
The digital baseband volume matrix is used for control-
ling the digital gain of the decoder as shown in Fig. 3–
3. This volume control is effective on both, the digital
audio output and the data stream to the D/A convert-
ers. The values are in 20-bit 2’s complement notation.
Table 3–9 shows the proposed settings for the 4 vol-
ume matrix coefficients for stereo, left and right mono.
The gain factors are given in fixed point notation
(
−1.0×219 = 80000
hex).
The DSP volume control is available in Decoder Mode
only.
Fig. 3–3: Digital volume matrix
If channels are mixed, care must be taken to prevent
clipping at high amplitudes. Therefore the sum of the
absolute values of coefficients for one output channel
should be less than 1.0.
For normal operating conditions it is recommended to
use the main volume control of the audio codec
instead (register 00 10hex of the audio codec).
−1
−1
−1
−1
LL
LR
RL
RR
+
+
left audio
right audio
Table 3–9: Settings for the digital volume matrix
Memory
D0:354
D0:355
D0:356
D0:357
Name
LL
LR
RL
RR
Stereo
(default)
−1.0
0
0
−1.0
Mono left
−1.0
−1.0
0
0
Mono right
0
0
−1.0
−1.0
Table 3–10: Content of D0:fd5 after reception of 19 ancillary bits.
D0:fd5
MSB
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
Ancillary
Data
4th
bit
5th
bit
6th
bit
...
...
...
...
...
...
...
...
...
...
17th
bit
18th
bit
last
bit
Table 3–11: Content of D0:fd6 after reception of 19 ancillary bits.
D0:fd6
MSB
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
Ancillary
Data
xx
xxxx
xxxx
xxxfirst
bit
2nd
bit
3rd
bit



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com