MAS3587F datasheet(7/82 Pages) MICRONAS

7 / 82 page

ADVANCE INFORMATION

MAS 3587F

Micronas

2. Functional Description of the MAS 3587F

2.1. Overview

The MAS 3587F is intended for use in consumer audio

applications. It encodes analog audio input, PCM data

or S/PDIF signals to variable bit rate MPEG 1/2 Layer

3 data streams. The compressed data is stored in an

external memory via the parallel port. For playback it

receives S/PDIF, parallel or serial data streams and

decodes MPEG Layer 2 and 3 (including the low sam-

pling frequency extensions).

2.2. Architecture of the MAS 3587F

The hardware of the MAS 3587F consists of a high-

performance RISC Digital Signal Processor (DSP),

and appropriate interfaces. A hardware overview of the

IC is shown in Fig. 2–1.

2.3. DSP Core

The internal processor is a dedicated DSP for

advanced audio applications.

2.4. RAM and Registers

The DSP core has access to two RAM banks denoted

D0 and D1. All RAM addresses can be accessed in a

20-bit or a 16-bit mode via I2C bus. For fast access of

internal DSP states the processor core has an address

space of 256 data registers which can be accessed by

I2C bus. For more details please refer to Section 3.3.

on page 24.

Fig. 2–1: The MAS 3587F architecture

'63 &RUH

÷2

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Mic. Input

(incl. Bias)

Line Input

S/PDIF Input 1

S/PDIF Input 2

Serial Audio

(I2S, SDI)

Serial Audio

(stream, SDIB)

VBAT

Xtal

18.432 MHz

CLKO

Parallel

I/O Bus

(PIO)

I2C

S/PDIF

Output

Serial

Audio

(I2S, SDO)

Audio

Output

control

ALU

MAC

Accumulators

ROM

Registers

Div.

A/D

Audio

Proc.

D/A

Control

DCCF

DCFR

DSP

Codec

Volt.

Mon.

I2C

Interface

Div.

Scaler

Osc.

PLL

Synth.

Synthesizer

Clock

MIX

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