MAS3587F datasheet(20/82 Pages) MICRONAS

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MAS 3587F

ADVANCE INFORMATION

Micronas

Table 3–3: Direct Configuration Registers

I2C Sub-

address

(hex)

Function

Name

Control Register (reset value = 3000hex)

bit[15:14]

Analog Supply Voltage Range

Code

AGNDC

recommended for voltage range of AVDD

1.1 V

2.0 ... 2.4 V (reset)

1.3 V

2.4 ... 3.0 V

1.6 V

3.0 ... 3.6 V

reserved

Higher voltage ranges permit higher output levels and thus a better signal-to-

noise ratio.

bit[13]

enable DC/DC 2 (reset=1)

bit[12]

enable DC/DC 1 (reset=1)

Both DC/DC converters are switched on by default.

bit[11]

enable and reset audio codec

bit[10]

enable and reset DSP core

For normal operation (MPEG-decoding and D/A conversion), both, the DSP

core and the audio codec have to be enabled after the power-up procedure.

The DSP can be left off if an audio signal is routed from the analog inputs to

the analog outputs (set bit[15] in codec register 00 0Fhex). The audio codec

can be left off if the DSP uses digital inputs and outputs only.

bit[9]

reset codec

bit[8]

reset DSP core

bit[7] 1)

reserved, must be set to zero

bit[6:0]

reserved, must be set to zero

CONTROL

1) usage in the next version: enable XTAL input clock divider (extended crystal range up to 28 MHz)

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