SPEAR600 datasheet(16/97 Pages) STMICROELECTRONICS

16 / 97 page

Architecture overview

SPEAr600

16/97

Doc ID 16259 Rev 3

2.8

JPEG codec

Main features:

●

Compliance with the baseline JPEG standard (ISO/IEC 10918-1)

●

Single-clock per pixel encoding/decoding

●

Support for up to four channels of component color

●

8-bit/channel pixel depths

●

Programmable quantization tables (up to four)

●

Programmable Huffman tables (two AC and two DC)

●

Programmable minimum coded unit (MCU)

●

Configurable JPEG headers processing

●

Support for restart marker insertion

●

Use of two DMA channels and of two 8 x 32-bits FIFOs (local to the JPEG) for efficient

transferring and buffering of encoded/decoded data from/to the codec core.

2.9

8-channel ADC

Main features:

●

Successive approximation ADC

●

10-bit resolution @1 Msps

●

Hardware over sampling and accumulation up to 128 samples

●

Eight analog input (AIN) channels, ranging from 0 to 2.5 V

●

INL ± 1 LSB, DNL ± 1 LSB

●

Programmable conversion speed, (min. conversion time is 1 µs)

●

Programmable averaging of results from 1 (No averaging) up to 128

2.10

Ethernet controller

Main features:

●

Supports the default Gigabit Media Independent Interface (GMII)/Media Independent

Interface (MII) defined in the IEEE 802.3 specifications.

●

Supports 10/100/1000 Mbps data transfer rates with any one or a combination of the

above PHY interfaces

●

Supports both half-duplex and full-duplex operation. In half-duplex operation,

CSMA/CD protocol is provided for, as well as packet bursting and frame extension at

1000 Mbps

●

Programmable frame length to support both Standard and Jumbo Ethernet frames with

size up to 16 Kbytes

●

32-bit data transfer interface on system-side

●

A variety of flexible address filtering modes are supported

●

A set of control and status registers (CSRs) to control GMAC Core operation.

●

Complete network statistics with RMON Counters (MMC, MAC Management

Counters).

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