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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HT67F488 데이터시트(PDF) 113 Page - Holtek Semiconductor Inc |
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HT67F488 데이터시트(HTML) 113 Page - Holtek Semiconductor Inc |
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113 / 171 page  Rev. 1.60 113 �ove��e� ��� �016 HT67F488/HT67F489 TinyPowerTM A/D Flash MCU with LCD & EEPROM UART External Pin Interfacing Tocommunicatewithanexternalserialinterface,theinternalUARThastwoexternalpinsknown asTXandRX.TheTXpinistheUARTtransmitterpin,whichcanbeusedasageneralpurpose I/Oorotherpin-sharedfunctionalpinifthepinisnotconfiguredasaUARTtransmitter,which occurswhentheTXENbitintheUCR2controlregisterisequaltozero.Similarly,theRXpinisthe UARTreceiverpin,whichcanalsobeusedasageneralpurposeI/Oorotherpin-sharedfunctional pin,ifthepinisnotconfiguredasareceiver,whichoccursiftheRXENbitintheUCR2register isequaltozero.AlongwiththeUARTENbit,theTXENandRXENbits,ifset,willautomatically setuptheseI/Oorotherpin-sharedfunctionalpinstotheirrespectiveTXoutputandRXinput conditionsanddisableanypull-highresistoroptionwhichmayexistontheRXpin.IftheTXand RXpinsaresharedwiththeLCDoutputsandtheUARTinterfaceandLCDdriverbothareenabled simultaneously,theLCDdriverhastheprioritytousethecorrespondingpinsasLCDoutputs. UART Data Transfer Scheme TheblockdiagramshowstheoveralldatatransferstructurearrangementfortheUART.Theactual datatobetransmittedfromtheMCUisfirsttransferredtotheTXRregisterbytheapplication program.ThedatawillthenbetransferredtotheTransmitShiftRegisterfromwhereitwillbe shiftedout,LSBfirst,ontotheTXpinataratecontrolledbytheBaudRateGenerator.Onlythe TXRregisterismappedontotheMCUDataMemory,theTransmitShiftRegisterisnotmappedand isthereforeinaccessibletotheapplicationprogram. DatatobereceivedbytheUARTisacceptedontheexternalRXpin,fromwhereitisshiftedin, LSBfirst,totheReceiverShiftRegisterataratecontrolledbytheBaudRateGenerator.When theshiftregisterisfull,thedatawillthenbetransferredfromtheshiftregistertotheinternalRXR register,whereitisbufferedandcanbemanipulatedbytheapplicationprogram.OnlytheRXR registerismappedontotheMCUDataMemory,theReceiverShiftRegisterisnotmappedandis thereforeinaccessibletotheapplicationprogram. Itshouldbenotedthattheactualregisterfordatatransmissionandreception,althoughreferredto inthetext,andinapplicationprograms,asseparateTXRandRXRregisters,onlyexistsasasingle sharedregisterintheDataMemory.ThissharedregisterknownastheTXR/RXRregisterisusedfor bothdatatransmissionanddatareception. UART Status and Control Registers TherearefivecontrolregistersassociatedwiththeUARTfunction.TheUSR,UCR1andUCR2 registerscontroltheoverallfunctionoftheUART,whiletheBRGregistercontrolstheBaudrate. TheactualdatatobetransmittedandreceivedontheserialinterfaceismanagedthroughtheTXR/ RXRdataregisters. Register Name Bit 7 6 5 4 3 2 1 0 USR PERR �F FERR OERR RIDLE RXIF TIDLE TXIF UCR1 UARTE� B�O PRE� PRT STOPS TXBRK RX8 TX8 UCR� TXE� RXE� BRGH ADDE� WAKE RIE TIIE TEIE TXR/RXR TXRX7 TXRX6 TXRX5 TXRX4 TXRX3 TXRX� TXRX1 TXRX0 BRG BRG7 BRG6 BRG5 BRG4 BRG3 BRG� BRG1 BRG0 UART Register List |
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