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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HT67F488 데이터시트(PDF) 124 Page - Holtek Semiconductor Inc |
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HT67F488 데이터시트(HTML) 124 Page - Holtek Semiconductor Inc |
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124 / 171 page  Rev. 1.60 1�4 �ove��e� ��� �016 HT67F488/HT67F489 TinyPowerTM A/D Flash MCU with LCD & EEPROM Atthispointthereceiverwillbeenabledwhichwillbegintolookforastartbit. Whenacharacterisreceivedthefollowingsequenceofeventswilloccur: • TheRXIFbitintheUSRregisterwillbesetwhenRXRregisterhasdataavailable,atleastone morecharactercanberead. • WhenthecontentsoftheshiftregisterhavebeentransferredtotheRXRregister,theniftheRIE bitisset,aninterruptwillbegenerated. • Ifduringreception,aframeerror,noiseerror,parityerror,oranoverrunerrorhasbeendetected, thentheerrorflagscanbeset. TheRXIFbitcanbeclearedusingthefollowingsoftwaresequence: • AUSRregisteraccess • AnRXRregisterreadexecution Receive Break AnybreakcharacterreceivedbytheUARTwillbemanagedasaframingerror.Thereceiverwill countandexpectacertainnumberofbittimesasspecifiedbythevaluesprogrammedintotheBNO andSTOPSbits.Ifthebreakismuchlongerthan13bittimes,thereceptionwillbeconsideredas completeafterthenumberofbittimesspecifiedbyBNOandSTOPS.TheRXIFbitisset,FERR isset,zerosareloadedintothereceivedataregister,interruptsaregeneratedifappropriateandthe RIDLEbitisset.Ifalongbreaksignalhasbeendetectedandthereceiverhasreceivedastartbit, thedatabitsandtheinvalidstopbit,whichsetstheFERRflag,thereceivermustwaitforavalid stopbitbeforelookingforthenextstartbit.Thereceiverwillnotmaketheassumptionthatthe breakconditiononthelineisthenextstartbit.Abreakisregardedasacharacterthatcontainsonly zeroswiththeFERRflagset.Thebreakcharacterwillbeloadedintothebufferandnofurtherdata willbereceiveduntilstopbitsarereceived.ItshouldbenotedthattheRIDLEreadonlyflagwillgo highwhenthestopbitshavenotyetbeenreceived.ThereceptionofabreakcharacterontheUART registerswillresultinthefollowing: • Theframingerrorflag,FERR,willbeset. • Thereceivedataregister,RXR,willbecleared. • TheOERR,NF,PERR,RIDLEorRXIFflagswillpossiblybeset. Idle Status Whenthereceiverisreadingdata,whichmeansitwillbeinbetweenthedetectionofastartbitand thereadingofastopbit,thereceiverstatusflagintheUSRregister,otherwiseknownastheRIDLE flag,willhaveazerovalue.Inbetweenthereceptionofastopbitandthedetectionofthenextstart bit,theRIDLEflagwillhaveahighvalue,whichindicatesthereceiverisinanidlecondition. Receiver interrupt ThereadonlyreceiveinterruptflagRXIFintheUSRregisterissetbyanedgegeneratedbythe receiver.AninterruptisgeneratedifRIE=1,whenawordistransferredfromtheReceiveShift Register,RSR,totheReceiveDataRegister,RXR.Anoverrunerrorcanalsogenerateaninterruptif RIE=1. |
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