WM8232 datasheet(85/141 Pages) CIRRUS

85 / 141 page

WM8232

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R117 (75h)

AGC peak

level IN2 LSB

7:0

PEAK_IN2[7:0]

0000_0000

LSBs of detected peak level of IN2 (Read Only)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R118 (76h)

AGC peak

level IN2

MSB

1:0

PEAK_IN2[9:8]

MSBs of detected peak level of IN2 (Read Only)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R123 (7Bh)

AGC peak

level IN3 LSB

7:0

PEAK_IN3[7:0]

0000_0000

LSBs of detected peak level of IN3 (Read Only)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R124 (7Ch)

AGC peak

level IN3

MSB

1:0

PEAK_IN3[9:8]

MSBs of detected peak level of IN3 (Read Only)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R128 (80h)

DLL config 1

5:4

DLGAIN[1:0]

gain control of DLL delay line

Need to set according to input frequency. See details in

“PLL DLL Setup”

DLLRST

reset DLL delay line

0 = normal

1= reset DLL

CKOSTB

standby TG clock output

0 = generate TG clock

1 = stop generation of TG clock

AFECKSTB

standby AFE clock (VSMP/RSMP/ADCK) output

0 = generate AFE clock

1 = stop generation of AFE clock

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R129 (81h)

DLL config 2

5:4

LVDLGAIN[1:0]

gain control of LVDS DLL delay line

Need to set according to input frequency. See details in

“PLL DLL Setup”

WM8232 데이터시트(PDF) 85 Page - Cirrus Logic

WM8232 데이터시트(HTML) 85 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL